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Task 3 📚
VERILOG CODES
2:4 DECODER - BFL
2:4 DECODER - DFL
3:8 DECODER - BFL
3:8 DECODER - DFL
2:4 AND 3:8 DECODER - DFL
2:1 mux SL
4:1 mux SL
8:1 MUX SL
16:1 MUX SL
2:1 MUX DFL
2:1 MUX BFL
2:1 MUX CONDITIONAL
CIRCUITVERSE LINKS
CircuitVerse link for POS EXPRESSION USING MUX
CircuitVerse link for SOP EXPRESSION USING MUX
CircuitVerse link for Full adder USING 8x1 MUX
CircuitVerse link for 16:1 MUX using 8:1 MUX
CircuitVerse link for 8:1 MUX using 4:1 MUX
CircuitVerse link for 4:1 MUX USING 2:1 MUX
CircuitVerse link for AOI LOGIC 2:1 MUX
CircuitVerse link for OAI LOGIC 2:1 MUX
CircuitVerse link for DECODER POS EXPRESSION
CircuitVerse link for DECODER SOP EXPRESSION
CircuitVerse link for SOP EXPRESSION USING 4:1 MUX
CircuitVerse link for SOP EXPRESSION USING 8:1 MUX
CircuitVerse link for NAND LOGIC 4:2 ENCODER
CircuitVerse link for AOI LOGIC 4:2 ENCODER
CircuitVerse link for NAND LOGIC of 2:4 Decoder
CircuitVerse link for AOI LOGIC 2:4 Decoder
CircuitVerse link for 3*8 DECODER USING TWO 2*4 DECODER
CircuitVerse link for 1:2 DECODER
CircuitVerse link for 2:4 decoder using 1:2 decoder
Course Instructor : Dr Dhanabal R | Website made by : R Tharun